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mmwave receive r - s m t 1 HMC6001LP711E v 0 0.1112 milli m eterwave r eceiver 57 - 64 ghz functional diagram features support for ieee c hannel plan receiver gain: 2 - 67 db noise figure: 7.0 db i ntegrated low profle a ntenna: 7.5 dbi i ntegrated i mage reject filter i ntegrated frequency synthesizer programmable i f and baseband gain blocks universal a nalog i /q baseband i nterface i ntegrated am and f m demodulator three-wire serial digital i nterface 60 lead 7x11 mm s m t package: 77mm 2 t ypical a pplications the h mc 6001lp711 e is ideal for: ? wigig single c arrier m odulations ? 60 ghz i s m band data transmitter ? m ulti-gbps data c ommunications ? high defnition v ideo transmission ? rf i d general description the h mc 6001lp711 e is a complete mmwave receiver ic and low profle antenna integrated in a plastic surface mount package. the receiver includes an ln a , image reject flter, rf to i f downconverter, i f flter, i /q downconverter, and frequency synthesizer. the receiver operates from 57 to 64 ghz with 1.8 ghz modulation bandwidth. a n integrated synthesizer provides tuning in 500 or 540 m hz step sizes depending on the choice of external reference clock. support for a wide variety of modulation formats is provided through a universal analog baseband i q interface. together with the h mc 6000lp711 e , a complete transmit/receive chipset is provided for multi-gbps operation in the unlicensed 60 ghz i s m band. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 2 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t able 1. e lectrical specifcations, ta = +25 c , see t est c onditions parameter c ondition m in. typ. m ax. units frequency range 57 64 ghz frequency step size 308.5714 m hz ref c lk 0.54 ghz frequency step size 285.714 m hz ref c lk 0.50 ghz m odulation bandwidth m ax bw setting, 5db bw, double-sided 1.8 ghz m ax gain total pout at all 4 baseband outputs minus pin at the ic [1] 67 db gain c ontrol range 65 db gain step size 1 db a ntenna gain m easured on e valuation board 7. 5 dbi noise figure at m ax gain with a ntenna [2] 7 db i nput i p3 pin at ic [1], set to m in gain -27 dbm i nput p1db pin at ic [1], set to m in gain -36 dbm i mage rejection >35 db sideband suppression 27 dbc phase noise @ 100 khz -72 dbc/hz phase noise @ 1 m hz -86 dbc/hz phase noise @ 10 m hz -111 dbc/hz phase noise @ 100 m hz -125 dbc/hz phase noise @ 1 ghz -127 dbc/hz pll loop bw i nternal loop fflter 200 khz power dissipation 0.610 w [1] does not include antenna gain. [2] specifcation includes loss contribution due to antenna-in-package. t able 2. t est c onditions reference frequency 308.5714 m hz temperature +25 c gain setting m ax i nput signal level -65 dbm i f bandwidth m ax i nput i mpedance 50 single- e nded output i mpedance 100 differential for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 3 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t able 3. r ecommended operation c onditions description symbol m in typical m ax units a nalog ground gnd 0 v dc power supplies vcc _buf vcc _r e g vcc _ i f vcc _tr i p vcc _d iv vcc _ mi x vcc _ln a 2.565 2.7 2.835 v dc v ddd v dd_pll 1.3 1.35 1.48 v dc i nput v oltage ranges serial digital i nterface C logic high d a ta en a bl e c lk r e s e t 0.9 1.2 1.4 v serial digital i nterface C logic low d a ta en a bl e c lk r e s e t -0.05 0.1 0.3 v reference c lock r efc lkp r efc lk m 3.3 or 2.5 v lv p ec l /l v ds 1.2 v cm os v baseband i and q [1] v out_ im v out_ i p v out_q m v out_qp 10 50 200 mv p-p baseband i and q c ommon m ode 1.3 v temperature -40 +85 c [1] baseband voltage at each of the 4 baseband outputs t able 4. power c onsumption v oltage typical c urrent (m a ) typical power c onsumption (watts) vcc _buf (2.7 v dc) 67 0.60 vcc _r e g (2.7 v dc) 13 vcc _ i f (2.7 v dc) 37 vcc _tr i p (2.7 v dc) 47 vcc _d iv (2.7 v dc) 34 vcc _ mi x (2.7 v dc) 15 vcc _ln a (2.7 v dc) 11 v ddd (1.35 v dc) 1 0.01 v dd_pll (1.35 v dc) 7 for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 4 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz 55 60 65 70 75 57.2 58.3 59.4 60.5 61.6 62.6 63.7 min. bias typical bias max. bias gain (db) frequency (ghz) 0 2 4 6 8 10 57.2 58.3 59.4 60.5 61.6 62.6 63.7 +25c +85c -40c noise figure (db) frequency (ghz) 0 5 10 15 20 57.2 58.3 59.4 60.5 61.6 62.6 63.7 min gain mid gain max gain noise figure (db) frequency (ghz) 55 60 65 70 75 57.2 58.3 59.4 60.5 61.6 62.6 63.7 +25c +85c -40c gain (db) frequency (ghz) figure 1. a ntenna peak gain vs. frequency [1] figure 2. a ntenna gain vs. a ngle and principal plane c ut [1] figure 3. ic gain vs. frequency a cross v oltage [2][3] figure 4. ic gain vs. frequency over t emperature [2][3] figure 5. ic noise figure vs. frequency and i f gain [3] figure 6. ic noise figure vs. frequency over t emperature [2][3] [1] a ntenna patterns and gain are measured on packages mounted on the e valuation p c b daughtercards (see p.10). [2] specifed at maximum gain setting. [3] m easured without antenna gain. 0 2 4 6 8 10 12 14 16 18 57.2 58.3 59.4 60.4 61.5 62.6 63.7 gain (dbi) frequency (ghz) -20 -15 -10 -5 0 5 10 0 30 60 90 120 210 240 270 300 330 e-plane h-plane cos gain (dbi) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 5 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz 0 2 4 6 8 10 57.2 58.3 59.4 60.5 61.6 62.6 63.7 min. bias typical bias max. bias noise figure (db) frequency (ghz) -40 -35 -30 -25 -20 57.2 58.3 59.4 60.5 61.6 62.6 63.7 min. bias typical bias max. bias iip3 (dbm) frequency (ghz) -45 -40 -35 -30 57.2 58.3 59.4 60.5 61.6 62.6 63.7 min. bias typical bias max. bias ip1db (dbm) frequency (ghz) -40 -35 -30 -25 -20 -15 -10 57.2 58.3 59.4 60.5 61.6 62.6 63.7 +25c +85c -40c iip3 (dbm) frequency (ghz) -45 -40 -35 -30 57.2 58.3 59.4 60.5 61.6 62.6 63.7 +25c +85c -40c ip1db (dbm) frequency (ghz) figure 7. ic noise figure vs. frequency a cross v oltage [2][3] figure 8. i nput p1db vs. frequency a cross v oltage [3][4] figure 9. i nput p1db vs. frequency over t emperature [3][4] figure 10. i nput i p1db vs. frequency and gain [3] figure 11. i nput i p3 vs. frequency a cross v oltage [3][4] figure 12. i nput i p3 vs. frequency over t emperature [3][4] [2] specifed at maximum gain setting, [3] m easured without antenna gain. [4] specifed at minimum gain setting, -55 -50 -45 -40 -35 -30 57.2 58.3 59.4 60.5 61.6 62.6 63.7 if attn=min, bb attn=5db if attn=min, bb attn=max if attn=max, bb attn=5db if attn=max, bb attn=max ip1db (dbm) frequency (ghz) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 6 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz -30 -27 -24 -21 -18 -15 -12 -9 -6 -3 0 100 300 500 700 900 1100 1300 1500 1700 1900 2100 min. bias typical bias max. bias attenuation (db) frequency offset (mhz) -30 -25 -20 -15 -10 -5 0 0123456789101112131415 +25c +85c -40c attenuation (db) if attenuation setting -30 -27 -24 -21 -18 -15 -12 -9 -6 -3 0 100 300 500 700 900 1100 1300 1500 1700 1900 2100 +25c +85c -40c attenuation (db) frequency offset (mhz) -30 -25 -20 -15 -10 -5 0 0123456789101112131415 57.24 ghz 60.48 ghz 63.72 ghz attenuation (db) if attenuation setting -45 -40 -35 -30 -25 -20 -15 -10 -5 0 1 6 11 16 21 26 31 36 41 +25c +85c -40c attenuation (db) baseband setting (db) figure 13. i nput i p3 vs. frequency and gain [3] figure 14. baseband a ttenuation over t emperature figure 15. i f a ttenuation vs. a ttenuator setting vs frequency figure 16. i f a ttenuation vs. a ttenuator setting over t emperature [5] figure 17. single sided passband r esponse vs. v oltage [5][6] figure 18. single sided passband r esponse vs. t emperature [5][6] [3] m easured without antenna gain. [5] m easured with a 60.48 ghz carrier. [6] specifed at maximum bw setting. -55 -50 -45 -40 -35 -30 -25 -20 57.2 58.3 59.4 60.5 61.6 62.6 63.7 if attn=min, bb attn=5db if attn=min, bb attn=max if attn=max, bb attn=5db if attn=max, bb attn=max iip3 (dbm) frequency (ghz) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 7 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz -30 -27 -24 -21 -18 -15 -12 -9 -6 -3 0 100 300 500 700 900 1100 1300 1500 1700 1900 2100 57.24 ghz 60.48 ghz 63.72 ghz attenuation (db) frequency offset (mhz) -30 -27 -24 -21 -18 -15 -12 -9 -6 -3 0 100 300 500 700 900 1100 1300 1500 1700 1900 2100 min bw mid bw max bw attenuation (db) frequency offset (mhz) -30 -27 -24 -21 -18 -15 -12 -9 -6 -3 0 100 300 500 700 900 1100 1300 1500 1700 1900 2100 min gain mid gain max gain attenuation (db) frequency offset (mhz) figure 19. single sided passband r esponse vs. i f gain [5][6] figure 20. single sided passband r esponse vs. frequency [6] figure 21. single sided passband r esponse b w vs. b w setting [5] figure 22. sideband suppression vs. frequency across v oltage [2] [2] specifed at maximum gain setting. [5] m easured with a 60.48 ghz carrier. [6] specifed at maxium bw setting. 0 10 20 30 40 50 57.2 58.3 59.4 60.5 61.6 62.6 63.7 +25c +85c -40c sideband suppression (dbc) frequency (ghz) 0 10 20 30 40 50 57.2 58.3 59.4 60.5 61.6 62.6 63.7 min gain mid gain max gain sideband suppression (dbc) frequency (ghz) figure 23. sideband suppression vs. frequency over t emperature [2] figure 24. sideband suppression vs. frequency and i f gain 0 10 20 30 40 50 57.2 58.3 59.4 60.5 61.6 62.6 63.7 min. bias typical bias max. bias sideband suppression (dbc) frequency (ghz) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 8 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t able 5. a bsolute maximum r atings i nput power to ic 0 dbm v dd = 2.7 v 2.85 v dc vcc = 2.7 v 2.85 v dc v dd_pll = 1.35 v 1.6 v dc v ddd = 1.35 v 1.6 v dc gnd 0 50 m v serial digital i nterface i nput v oltage 1.5 v dc ref c lk i nput ( ac coupled)(each) 0.75 v p-p baseband outputs (bb, f m ) 0.75 v p-p junction temperature 125 c c ontinuous pdiss (t=85 c ) (derate 45 mw/ c above 85 c ) 0.760 w thermal resistance (rth) (junction to ground paddle) 22.16 c / w storage temperature -55 c to 150 c operating temperature -40 c to 85 c e sd sensitivity (hb m ) c lass 1 a outline drawing t able 6. package i nformation part number package body m aterial lead finish m sl rating package m arking h m c 6 0 01lp711 e rohs-compliant low stress i njection m olded plastic silica and silicon 100% matte sn m sl3 h600 1 xxxx [1] 4-digit lot number xxxx not e s: 1. a ll d ime ns i ons a r e i n i n c h e s [ mm ] 2. l ea d sp aci ng tol e r a n ce i s non- c u m ul a t ive . 3. p a d burr l e nght sh a ll b e 0.15 mm ma x. p a d burr h ei ght sh a ll b e 0.05 mm ma x. 4. p ac k a g e w a rp sh a ll not e x cee d 0.05 mm 5. a ll ground l ea ds a nd ground p a ddl e m ust b e sold e r e d to p c b rf ground 6. r e f e r to h i tt i t e a ppl ica t i on not e for sugg e st e d p c b l a nd p a tt e rn. stresses above those listed under a bsolute m aximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specifcation is not implied. e xposure to absolute maximum rating conditions for extended periods may affect device reliability. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 9 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t able 7. pin descriptions pin number function description 1 s ca nout serial digital interface out (1.2 v cm os) - 50k 2 r e s e t a synchronous reset-all registers (1.2 v cm os, active high) - 50k 3, 8-14, 20, 21, 51 nc these pins are not connected internally 4 v dd_pll 1.35 supply ( vc o) 5 r efc lk m xtal r e f c lk m inus - ac or d c coupled - 50 6 r efc lkp xtal r e f c lk m inus - ac or d c coupled - 50 7 vcc _r e g 2.7 v supply ( vc o) 15 vcc _d iv 2.7 v supply (divider) 16 vcc _tr i p 2.7 v supply (tripler) 17 vcc _ i f 2.7 v supply ( i f) 18 vcc _ mi x 2.7 v supply ( m ixer) 19 vcc _ln a 2.7 v supply (ln a ) 22-50 gnd these pins and package bottom must be connected to rf/d c ground externally. 52 en a bl e serial digital interface enable (1.2 v cm os) - 50k 53 c lk serial digital interface clock (1.2 v cm os) - 50k 54 d a ta serial digital interface data (1.2 v cm os) - 50k 55 v out_q m baseband negative quadrature output C d c coupled - 50 (1.3 v c.m.) 56 v out_qp baseband positive quadrature output C d c coupled - 50 (1.3 v c.m.) 57 v ddd 1.35 supply (serial data interface) 58 vcc _buf 2.7 v supply (bb v ga and output buffers) 59 v out_ im baseband negative in-phase output C d c coupled - 50 (1.3 v c.m.) 60 v out_ i p baseband positive in-phase output C d c coupled - 50 (1.3 v c.m.) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 10 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz the circuit board used in the application should use rf circuit design techniques. signal lines should have 50 ohm impedance while the package ground leads and exposed paddle should be connected directly to the ground plane similar to that shown. a sufficient number of via holes should be used to connect the top and bottom ground planes. the evaluation circuit board shown is part of an evaluation kit available from hittite. e valuation p c b daughtercard a ntenna-in-package l ocation and polarization the antenna is located inside the package with geometric center and linear polarization angle as shown. the geometric center can be used as the antenna pattern phase center provided there is sufficient unobstructed ground plane extension around the chip. m easured antenna pattern phase centers will vary with frequecy and are dependent on fnite ground plane effects, and coupling to nearby components. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 11 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz i tem c ontents part number e valuation kit 2 daughtercard e valuation p c bs with h mc 6001lp711 e and h mc 6000lp711 e 2 m otherboard e valuation p c bs with crystals, usb i nterface, supply regulators and mc x connectorized i q interface. 2 wall mount power supplies. 2 usb a m ale to usb b female c able 8 phase matched mc x to s ma c ables c d ro m ( c ontains user m anual, e valuation p c b schematic, e valuation software) h mc 6450 e valuation kit order i nformation e valuation p c b schematics to view the e valuation p c b schematics please visit www.hittite.com and choose h mc 6001lp711 e from the search by part number pull down menu to view the product splash page. e valuation kit the h mc 6450 evaluation kit contains everything that is needed to set up a bi-directional 60 ghz millimeter-wave link using standard rf cable interfaces for baseband input and output. kit comes with two motherboard p c bs that provide on board crystals, usb interface, supply regulators, and s ma cables for connectorized i q interfaces. supplied software allows the user to read from and write to all chip level registers using a graphical user i nterface (gu i ) or upload previously saved register settings. e valuation p c b motherboard for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 12 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t heory of operation a n integrated frequency synthesizer creates a low-phase noise lo between 16.3 and 18.3 ghz. the step size of the synthesizer equates to 540 m hz steps at rf when used with 308.5714 m hz reference crystal (compatible with the ieee channels of the i s m band) or 500 m hz steps if used with a 285.714 m hz reference crystal. a 57 to 64 ghz signal is received by an integrated low profle antenna which is connected to the single-ended ln a on the ic . the lo is multiplied by three and mixed with the ln a output to downconvert to an 8 to 9.1 ghz sliding i f. a n integrated notch flter removes the image frequency. the i f signal is fltered and amplifed with 17 db of variable gain. i f the chip is confgured for i q baseband output, the i f signal is fed into a quadrature demodulator using the lo/2 to downconvert to baseband. there are also options to use on-chip demodulators capabable of to demodulating am / f m /fsk/ m sk waveforms. c ontact hittite application support for further guidance and application notes if interested in these modes. the phase noise and quadrature balance of the h mc 6001lp711 e is sufficient to demodulate up to 16q am modulation for high data rate operation. there are no special power sequencing requirements for the h mc 6001lp711 e ; all voltages are to be applied simultaneously. r egister a rray a ssignments and serial i nterface the register arrays for both the receiver and transmitter are organized into 16 rows of 8 bits. using the serial interface, the arrays are written or read one row at a time as shown in figure 25 and figure 26, respectively. figure 25 shows the sequence of signals on the e n a bl e , c lk, and d a t a lines to write one 8-bit row of the register array. the e n a bl e line goes low, the frst of 18 data bits (bit 0) is placed on the d a t a line, and 2 ns or more after the d a t a line stabilizes, the c lk line goes high to clock in data bit 0. the d a t a line should remain stable for at least 2 ns after the rising edge of c lk. the rx ic will support a serial interface running up to several hundred m hz, and the interface is 1.2 v cm os levels. a write operation requires 18 data bits and 18 clock pulses, as shown in figure 26. the 18 data bits contain the 8-bit register array row data (lsb is clocked in frst), followed by the register array row address (row0 through row15, 000000 to 001111, lsb frst), the read/write bit (set to 1 to write), and fnally the rx chip address 111, lsb frst). note that the register array row address is 6 bits, but only four are used to designate 16 rows, the two msbs are 0. a fter the 18th clock pulse of the write operation, the e n a bl e line returns high to load the register array on the ic ; prior to the rising edge of the e n a bl e line, no data is written to the array. the c lk line should have stabilized in the low state at least 2 ns prior to the rising edge of the e n a bl e line. figure 25. timing diagram for writing a row of the receiver serial interface for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 13 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz figure 26. timing diagram for reading a row of the receiver serial interface t able 8. r eceiver r egister a rray a ssignments register array row & bit internal signal name signal function row0 row0<7> ask_pwrdn a ctive high to power down a sk demodulator row0<6> bbamp_pwrdn_i a ctive high to power down i -channel baseband amplifer row0<5> bbamp_pwrdn_q a ctive high to power down q-channel baseband amplifer row0<4> divider_pwrdn a ctive high to power down local oscillator divider row0<3> if_bgmux_pwrdn a ctive high to power down one of three on-chip bandgap refs ( i f) and associated mux row0<2> ifmix_pwrdn_i a ctive high to power down i -channel i f to baseband mixer row0<1> ifmix_pwrdn_q a ctive high to power down q-channel i f to baseband mixer row0<0> ifvga_pwrdn a ctive high to power down i f variable gain amplifer row1 row1<7> ipc_pwrdn a ctive high to power down on chip current reference generator row1<6> lna_pwrdn a ctive high to power down low noise amplifer and reference row1<5> rfmix_pwrdn a ctive high to power down rf to i f mixer row1<4> tripler_pwrdn a ctive high to power down frequency tripler row1<3> bbamp_atten1_0 first baseband attenuator; row1<2:3> = 11 is 18 db attenuation 10 is 12 db attenuation 01 is 6 db attenuation 00 is 0 db attenuation row1<2> bbamp_atten1_1 for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 14 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t able 8. r eceiver r egister a rray a ssignments register array row & bit internal signal name signal function row1<1> bbamp_atten2_0 second baseband attenuator; row1<0:1> = 11 is 18 db attenuation 10 is 12 db attenuation 01 is 6 db attenuation 00 is 0 db attenuation row1<0> bbamp_atten2_1 row2 row2<7> bbamp_attenf_0 i c hannel baseband fne attenuator; row2<5:7> 101 is 5 db attenuation 100 is 4 db attenuation 011 is 3 db attenuation 010 is 2 db attenuation 001 is 1 db attenuation 000 is 0 db attenuation row2<6> bbamp_attenf_1 row2<5> bbamp_attenf_2 row2<4> bbamp_attenfq_0 q c hannel baseband fne attenuator; row2<2:4> 101 is 5 db attenuation 100 is 4 db attenuation 011 is 3 db attenuation 010 is 2 db attenuation 001 is 1 db attenuation 000 is 0 db attenuation row2<3> bbamp_attenfq_1 row2<2> bbamp_attenfq_2 row2<1> bbamp_selask a ctive high to multiplex the am detector output into the i channel baseband amplifer input row2<0> bbamp_sigshort a ctive high to short the input to the i and q channel baseband amplifers row3 row3<7> bbamp_selbw0 selects the low pass corner of the baseband amplifers; row3<6:7> = 00 is 1.4 ghz 01 is 500 m hz 10 is 300 m hz 11 is 200 m hz row3<6> bbamp_selbw1 row3<5> bbamp_selfastrec selects the high pass corner of the baseband amplifers; row3<4:5> = 00 is 30 khz 01 is 300 khz 10 is 1.5 m hz row3<4> bbamp_selfastrec2 row3<3> bg_monitor_sel<1> these bits are for reserved for diagnostic purposes; row3<3:0> = 0011 for normal operation row3<2> bg_monitor_sel<0> row3<1> if_refsel row3<0> lna_refsel row4 for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 15 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t able 8. r eceiver r egister a rray a ssignments register array row & bit internal signal name signal function row4<7> ifvga_bias<2> these bits are for biasing and i f flter alignment in the i f variable gain amplifer; row4<7:0> = 1001111x for normal operation row4<6> ifvga_bias<1> row4<5> ifvga_bias<0> row4<4> ifvga_tune<4> row4<3> ifvga_tune<3> row4<2> ifvga_tune<2> row4<1> ifvga_tune<1> row4<0> not used row5 row5<7> ifvga_vga_adj<3> i f variable gain amplifer gain control bits; row5<7:4> = 0000 is highest gain 1111 is lowest gain a ttenuation is 1 db / step, 20 db maximum row5<6> ifvga_vga_adj<2> row5<5> ifvga_vga_adj<1> row5<4> ifvga_vga_adj<0> row5<3> rfmix_tune<4> these bits control i f flter alignment in the rf mixer; row5<3:0> = 1111 for normal operation row5<2> rfmix_tune<3> row5<1> rfmix_tune<2> row5<0> rfmix_tune<1> row6 row6<7> tripler_bias<13> these bits control the biasing of the frequency tripler; row6<7:0> = 10111111 for normal operation row6<6> tripler_bias<12> row6<5> tripler_bias<11> row6<4> tripler_bias<10> row6<3> tripler_bias<9> row6<2> tripler_bias<8> row6<1> tripler_bias<7> row6<0> tripler_bias<6> row7 row 7<7> tripler_bias<5> these bits control the biasing of the frequency tripler; row7<7:2> = 011011 for normal operation row 7<6> tripler_bias<4> row 7<5> tripler_bias<3> row 7<4> tripler_bias<2> row7<3> tripler_bias<1> row 7<2> tripler_bias<0> row 7<1> bbamp_selfm a ctive high to multiplex the f m detector output into the q channel baseband amplifer input row7<0> fm_pwrdn a ctive high to power down f m demodulator row8 row8<7> lna_bias<2> these bits control biasing of the low noise amplifer; row8<7:5> = 100 for normal operation row8<6> lna_bias<1> row8<5> lna_bias<0> for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 16 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t able 8. r eceiver r egister a rray a ssignments register array row & bit internal signal name signal function row8<4> not used row8<4:3> = xx - not used row8<3> not used row8<2> ifvga_q_cntrl<2> these bits control the q of the i f flter in the i f variable gain amplifer; row8<2:0> = 000 for highest q and highest gain. to reduce q and widen bandwidth, increment row8<2:0> in the sequence: 001 100 101 111 row8<1> ifvga_q_cntrl<1> row8<0> ifvga_q_cntrl<0> row9 row9<7> not used row9<7:0> = xxxxxxxx - not used row9<6> not used row9<5> not used row9<4> not used row9<3> not used row9<2> not used row9<1> not used row9<0> not used row10 row10<7> rd aci n<5> vc o amplitude adjustment d ac ; row10<7:2> = 111100 for normal operation row10<6> rd aci n<4> row10<5> rd aci n<3> row10<4> rd aci n<2> row10<3> rd aci n<1> row10<2> rd aci n<0> row10<1> synr e s e t row10<1> = 0 for normal operation row10<0> d iv r a t i o<4> row10<0> c ontrol the synthesizer divider ratio and output frequency. refer to tables 9 and 10 for synthesizer control details row11 row11<7> d iv r a t i o<3> row11<7:4> c ontrol the synthesizer divider ratio and output frequency. refer to tables 9 and 10 for synthesizer control details. row11< 6> d iv r a t i o<2> row11<5> d iv r a t i o<1> row11<4> d iv r a t i o<0> row11<3> ba nd<2> row11<3:1> c ontrol the vc o band, and must be changed when tuning the synthesizer output frequency. refer to tables 9 and 10 for synthesizer control details. row11< 2> b a nd<1> row11<1> b a nd<0> row11<0> r e fs e ld iv these bits are for reserved for diagnostic purposes; row11<0> = 1 for normal operation row12 row12<7> c pb ia s<2> these bits control the synthesizer charge pump bias. row12<7:5> = 010 for normal operation row12<6> c pb ia s<1> row12<5> c pb ia s<0> for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 17 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz t able 8. r eceiver r egister a rray a ssignments register array row & bit internal signal name signal function row12<4> v rs e l<3> these bits control the width of the lock window for the synthesizer lock detector. row12<4:1> = 1111 specifes the widest lock window for normal operation row12<3> v rs e l<2> row12<2> v rs e l<1> row12<1> v rs e l<0> row12<0> r e fs e l vc o this bit is reserved for diagnostic purposes; row12<0> = 1 for normal operation row13 row13<7> m uxr ef this bit is reserved for diagnostic purposes; row13<7> = 1 for normal operation row13<6> d iv 4 row13<6> = 0 for normal operation row13<5> e nd c a ctive high to enable d c coupling on synthesizer reference input; row13<5> = 0 for normal operation row13<4> in i this bit is reserved for diagnostic purposes; row13<4> = 0 for normal operation row13<3> pdd iv 12 a ctive high to power down 1.2 v circuits in synthesizer divider row13<2> pdd iv 27 a ctive high to power down 2.7 v circuits in synthesizer divider row13<1> pdqp a ctive high to power down synthesizer charge pump row13<0> pd vc o a ctive high to power down synthesizer vc o row14 row14<7> pd ca l a ctive high to power down vc o calibration comparators; row14<7> = 0 for normal operation row14<6> m uxout c ontrols multiplexing of diagnostic bits, high to read row15<7:0> row14<6> = 1 for normal operation row14<5> pd a l c 12 a ctive high to power down vc o automatic level control ( a l c ); row14<5> = 1 for normal operation row14<4> plo a d a ctive high to load external amplitude adjustment bits for vc o row14<4> = 1 for normal operation row14<3> w i d e <1> c ontrol bits for vc o alc loop; row14<3:2> = 01 for normal operation row14<2> w i d e <0> row14<1> sl e w<1> c ontrols slew rate in sub-integer n divider row14<1:0> = 10 for normal operation row14<0> sl e w<0> row15 row15<7> c o m pp read only bits to indicate synthesizer lock: row15<7:6> = 01 indicates that the vc o control voltage is within the lock window and the synthesizer is locked. 11 indicates the vc o control voltage above lock window 00 below lock window 10 is a disallowed state indicating an error row15<6> c o m pn row15<5> rd acm sb<2> these bits are read only and reserved for factory diagnostic purposes. row15<4> rd acm sb<1> row15<3> rd acm sb<0> row15<2> rd acm ux<0> these bits are read only and reserved for factory diagnostic purposes. row15<1> rd acm ux<1> row15<0> rd acm ux<2> for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com
mmwave receive r - s m t 18 HMC6001LP711E v 0 0.1112 m illi m eterwave receiver 57 - 64 ghz synthesizer settings t able 9. ieee c hannels using 308.5714 mhz r eference frequency (ghz) divider setting typical band setting 57. 24 10101 001 57.78 10100 001 58.32 ( ieee c h 1) 10 011 010 58.86 10010 010 59.40 10001 011 59.94 10000 011 60.48 ( ieee c h 2) 11111 100 61.02 00000 100 61.56 00001 101 62.10 00010 101 62.64 ( ieee c h 3) 00011 110 63.18 00100 110 63.72 00101 111 divide ratio settings consist of registers row10 bit <0> (msb) and row11 bits <4:7> (4 lsbs) t able 10. 500 mhz c hannels using 285.7143 mhz r eference frequency (ghz) divider setting typical band setting 57 00001 000 57. 5 00010 000 58 00011 001 58.5 00100 001 59 00101 010 59.5 0 0110 010 60 0 0111 011 60.5 01000 011 61 01001 100 61.5 01010 100 62 01011 101 62.5 0110 0 101 63 01101 110 63.5 01110 110 64 01111 111 divide ratio settings consist of registers row10 bit <0> (msb) and row11 bits <4:7> (4 lsbs) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or txrx@hittite.com

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